ECE 420 : Introduction to VLSI


 Cross-Listings :   ECE 520 (Graduate version)
Years :   2019
Lecture / Lab :   PH-0224 ,  M   17:45 - 20:35
Prerequisites :  

Circuits II

Environment :   Unix, Cadence Tools.
Description :  

Review of the operation of NMOS and PMOS transistors and the principles of CMOS digital IC design using these two transistors. Students will use the Cadence tool suite to draw a schematic for their IC, analyze it, and design a layout using the Cadence layout editor. They will study transistor sizing and interconnects to understand propagation delays. Digital gate designs for NOR, NAND, OR, half adder, and full adder will be studied. The final project is an 8x8 multiplier that uses multiple gates.

Workload :   8 labs, 2 exams, 4 projects (1 large final project).
Textbook :   CMOS VLSI Design. A Circuits and Systems Perspective. 4th Edition.
Neil H. E. Weste and David M. Harris, ISBN # 978-0321547743